The Pixel 8 sequence, anticipated to be unveiled in October, can be the first units powered by the Google Tensor 3 chipset. Tipster Kamila Wojciechowska revealed to Android Authority all of the juicy particulars associated to the Tensor 3 SoC. First of all, the latter carries a codename of zuma and can function a nine-core configuration of 1+4+4. This will consist of 1 Cortex-X3 prime CPU core operating at 3.0GHz, 4 Cortex-A715 efficiency CPU cores with a clock velocity of two.45GHz, and 4 Cortex-A510 effectivity CPU cores operating at 2.15GHz.
While this configuration ought to assist the Tensor 3 observe the efficiency of the Snapdragon 8 Gen 2, it will not be as highly effective as the upcoming Snapdragon 8 Gen 3 and MediaTek’s subsequent flagship smartphone chipset since these will benefit from Arm’s not too long ago introduced Cortex-X4 prime CPU core, the Cortex-A720 efficiency CPU core, and the Cortex-A520 effectivity CPU core. The Cortex-X4 delivers 15% extra efficiency utilizing 40% much less energy in accordance to Arm.
The Tensor 3 can be ready to present the Pixel 8 line with Arm’s Memory Tagging Extensions (MTE) that may assist beat off some memory-based assaults. And as a result of the Tensor 3 will use Arm’s v9 structure, Pixel 8 customers will get to get pleasure from a 64-bit-only expertise. The Tensor 3 will function Arm’s Mali-G715 GPU which could function 10 cores as opposed to 7 on the Mali-G710 GPU featured on the Tensor 2. As a consequence, recreation gamers may see extra life like lighting, reflections, and shadows thanks to ray tracing.
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We are actually arising to the launch of the third Google Tensor chipset
The Pixel 8 line will get an improve to Universal Flash Storage (UFS) 4.0 from the UFS 3.1 used on the Pixel 7 sequence. Already employed by the Galaxy S23 sequence, UFS 4.0 delivers a sequential learn velocity of up to 4200MBps and a sequential write velocity of up to 2800MBps. Compare that to the sequential learn velocity of up to 2100MBps and sequential write velocity of up to 1200MBps for UFS 3.1. Data will switch sooner, and with extra energy effectivity.
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We most likely won’t see any change to the modem used on the Tensor 3. The Tensor 2 upgraded to the Exynos Modem 5300 after the Pixel 6 sequence had severe connectivity points with the Exynos Modem 5123 used with the first Tensor chipset. The Tensor 3 will use the Exynos Modem 5300 though it will likely be a distinct variant than the one used on final 12 months’s Tensor SoC.
And lastly, the Tensor 3 will sport a brand new model of Google’s Tensor Processing Unit (TPU) AI accelerator. Codenamed “Rio,” the chip will run at 1.1GHz in contrast to the 1.0GHz clock velocity of its predecessor. Google claimed that the TPU on the Tensor 2 was 60% sooner for digital camera and speech duties so we’d see an honest enchancment in AI options this 12 months.
